Amazon

Senior ISP Design, SSG

Posted On

Feb. 2, 2026

Location

Bengaluru, Karnataka

Experience Level

Freshers/Experienced

Job Type

Hardware Development

Apply By

Feb. 24, 2026

Job Description

Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced numerous devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create?

The Role: As a Senior ISP Designer, you will be part of an advanced design and architecture team that is creating the semiconductor designs which will power millions of new Amazon devices. You will work closely with multi-disciplinary groups including System Architecture, Architecture, and Software teams, to architect and implement the advanced imaging pipelines that will enable our products to capture the world with stunning clarity.

Key job responsibilities
In this role, you will:

* Architect and Design world class imaging hardware
* Communicate and work with team members across multiple disciplines
* Develop detailed design specifications and documentation
* Perform RTL coding and synthesis
* Work with Partners/Suppliers to optimize and customize their products
* Run industry standard code quality tools and fix issues found by them
* Participate in test plan and coverage reviews

The ideal candidate should have experience with RTL development environments and fluency in modern hardware description languages. They should have developed complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. They should have experience in design, development, and implementation of dedicated hardware for image processing pipelines. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI, APB, AHB, and implementations. Knowledge of image processing algorithms and experience with multimedia pipeline design is desirable. Experience with I/O interfaces such as SPI, eDP, HDMI, MIPI CSI/DSI/ is also preferred. Experience with memory instantiation and memory compilers is also preferred. We are looking for a self-driven individual who can work with architects, HW and SW developers and can quickly resolve blocking issues.
- Master's degree or Ph.D. degree in Electrical Engineering or related field
- Experience in micro-architecture definition from architecture guidelines and model analysis
- Experience with design of Image Signal Processing (ISP) pipelines and image processing algorithms
- 10+ years of RTL development experience with a record of taping out production silicon
- Experience with design development using Verilog/SystemVerilog
- Experience in performance/power/area analysis and trade-offs
- Proficient in design methodologies and EDA tools
- Experience working with Synthesis, timing closure, and design constraints

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