Google

Formal Verification Engineer, Platform IP

Job Description

  • Plan the formal verification strategy, create the properties and constraints for complex digital design blocks.
  • Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
  • Contribute improvements to methodologies to enhance formal verification results.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
  • 3 years of experience with SystemVerilog and SystemVerilog Assertions.
  • Experience with formal verification.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Science, or a related field.
  • Experience with scripting languages, such as Python/Perl and TCL.
  • Experience with formal sign-offs of industry ASIC designs.
  • Knowledge of formal verification applications such as sequential equivalence checking, and connectivity checking and data-path verification.
  • Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
  • 3 years of experience with SystemVerilog and SystemVerilog Assertions.
  • Experience with formal verification.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.


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