DESIGN VERIFICATION ENGINEER | 6 TO 9 YEARS | HYDERABAD & BENGALURU
Last Date to Apply: July 10, 2024
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DESIGN VERIFICATION ENGINEER | 6 TO 9 YEARS | HYDERABAD & BENGALURU
Job Description
Job Description
- You will be part of the team verifying IPs and SoCs leading to first Si success.
- Manage and lead a team of Verification engineers
- IP verification is coverage driven using latest industry standard methodologies and HVLs.
- Work involves defining verification strategy, writing test plans, developing efficient test benches and test cases.
- Code coverage, Functional coverage and assertions are desired.
- ARM based SoC verification experience is an added advantage.
- Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus.
- Multiple positions with emphasis on AMS and Power aware verification.
- Should have worked on GLS.
Primary Skills:
- Verilog, SV, UVM/OVM, IP Verification, SoC Verification, scripting – Perl, Python, Shell, and Tcl.
Secondary Skills:
- Test bench / model / VIP development, Functional coverage, GLS, LEC, Emulation, AMS, ARM, Protocols AHB/AXI/APB, Ethernet, USB, PCIe, I2C, SPI, CAN, Mipi CSI/DSI, LPDDR
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